Responsibilities
1. Participate in the implementation of ByteDance's data center hardware acceleration project, and be responsible for the development and debugging of the heterogeneous computing basic software stack 2. Collaborate closely with the hardware R&D team to carry out hardware and software integrated development, including but not limited to Feature enabling, driver development, and performance tuning 3. Explore technology trends and industry practices in fields such as FPGA/ASIC/GPU/RISC-V, and demonstrate the value and feasibility of new technologies in ByteDance's business scenarios.
Qualifications
1. Familiar with computer architecture, and have an in-depth understanding of at least one of the four architectures of X86, ARM, RISC-V, and GPU, and understand its microarchitecture, main instruction set, etc. 2. Proficient in development languages such as C/C++ 3. Familiar with Linux KMD/UMD development framework, have practical experience in high-performance driver development, and be familiar with SMMU/IOMMU, DMA, Interrupt, VFIO and other related modules 4. In-depth understanding of the Linux kernel, at least read the source code of one major subsystem (scheduling, network, I/O, memory, storage, network, etc.), and be familiar with PCIe protocol and device drivers 5. Have strong Linux kernel and user-mode program fault location and profiling capabilities Bonus points: 1. Familiar with mainstream hardware virtualization technology, and have an in-depth understanding of at least one of CPU virtualization, memory virtualization, IO virtualization (VirtIO, device pass-through technology), DPDK, and SPDK 2. Familiar with AI accelerator Runtime, Inference/Training Framework, with practical development and performance optimization experience 3. Have a certain understanding of one or more of OpenCL, CUDA and other heterogeneous computing platforms, machine learning, big data technology, and K8S technology.
