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Hardware Design Engineering - Senior Staff (Taiwan)
Synopsys Inc
Permanent Job
Hsinchu
,
Taiwan
0-2 years
HAPS
LINT
Vitis
ALLEGRO
make
Pads
synplify
MIPI
Xilinx
HDMI
EDK
Protosynthesis
DDRx
Vivado
AMBA
Protocompiler
Verdi
csh
Usb
Tcl
Bash
Pcie
Perl
Fpga
Vcs
Orcad
Python
13 days ago
Mixed Signal Analog Circuit Designer (RDSS Intern)
Mellanox Technologies
Permanent Job
Hsinchu
,
Taiwan
0-2 years
analog circuit layout concepts
analog circuit simulation tools
digital links
IO pads
XA
design and verification tools
Cadence custom circuit design tools
Skill
DVI
submicron CMOS technologies
DRC
high-speed serial links
Finesim
LVDS
HDMI
PLL techniques
Cadence"s IC design environment
virtuoso
LVS
low-jitter clock synthesis
Display Port
Hspice
ADC
display interfaces
MIPI PHY
Usb
perl
python
Scripting Languages
11 days ago
HAPS Hardware Engineering, Sr Staff Engineer
Synopsys Inc
Permanent Job
Hsinchu
,
Taiwan
0-2 years
ALLEGRO
Protocompiler
RTL
TalentPros
Protosynthesis
csh
HAPS
Verdi
S2C
Pads
MIPI
AMBA
Vivado
HDMI
DDRx
synplify
Fpga
Vcs
Makefile
Bash
Python
Usb
Orcad
Pcie
Perl
Tcl
3 months ago
1
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