Pll Jobs

Mixed Signal Analog Circuit Designer (RDSS Intern)

Permanent Job

Hsinchu ,

Taiwan

0-2 years

analog circuit layout concepts analog circuit simulation tools digital links IO pads XA design and verification tools Cadence custom circuit design tools Skill DVI submicron CMOS technologies DRC high-speed serial links Finesim LVDS HDMI PLL techniques Cadence"s IC design environment virtuoso LVS low-jitter clock synthesis Display Port Hspice ADC display interfaces MIPI PHY Usb perl python Scripting Languages

11 days ago

Senior Mixed Signal Circuit Design Engineer

Permanent Job

Hsinchu ,

Taiwan

3-5 years

CMOS Analog Design analog simulation Digital Circuits Hspice integrated circuit designs ac/dc/tran analysis Cadence Virtuoso post-silicon bring-up noise analysis architecture Verification high-speed routings Communication Skills Schematic Transistor Design FINFET Analytical Skills Silicon Characterization Layout Spectre loop stability analysis monte-carlo test bench environments data rates TX/RX/Clocking Pll Floorplan Debugging Eda

15 days ago

Home

pll Jobs

Top Industry

Pll Jobs

Mixed Signal Analog Circuit Designer (RDSS Intern)

Senior Mixed Signal Circuit Design Engineer