Hardware Design Engineering - Senior Staff (Taiwan)

Job Description and Requirements

Synopsys is uniquely positioned to offer the most comprehensive prototyping solution in market today. HAPS system is the prototyping solution of Synopsys ASIC validation flow, it's the industry's performance & capacity leader in prototyping.

As a hardware designer, candidate will be primarily responsible for successful deployment of HAPS related board design including its validation. He or she will closely work with AE and customers to propose and design/validate protocol interface card solution on HAPS which can be a reference design kit

.
Candidate should be also able to investigate/understand schematics and layout of HAPS daughter board to debug any PCB issues. The position offers a great opportunity not only to grow by learning kinds of peripheral interface solution but also communication skills and project management capability from Synopsy

s.
Education Requireme

• ntsCollege degree(or above) in Electrical Engineering/ Computer Science rela

ted
Skills/Experi

• enceGood team player and communication sk
• illsGood experience on porting RTL to FPGA using Vivado or Synplify/Protocompiler/Protosynthesis or 3rd party FPGA synthes
• izerGood expertise on one of the following FPGA prototyping platforms such as HAPS/S2C/TalentPros etc. where with related FPGA compile/runtime/debug experience is appreciated and prefe
• rredFamiliar with one of following protocols: MIPI/HDMI/AMBA/USB/PCIE/DDRx
• etc.Experience on Driver/FW/SOC FPGA debug/develop
• mentFamiliar with simulation and debug tools such as VCS and Verdi/
• LINTFamiliar with scripting language like Perl/Python/Tcl/CSH/BASH/Make
• fileFluent English on reading/writing (esp. technical s

pec)
Nice to

• have Experience on hardware board design tools such as Orcad/PADS and Al
• legroExperience on multi FPGA partition with well timing constraint know
• ledgeExperience on Xilinx high speed IO application such as using GT
• H/GTYExperience on Xilinx EDK/Vitis development